The TPE5 is based on a core architecture that is well proven and has been deployed in numerous standard and custom designs.
An MPC107 North Bridge is used to connect the CPU to the SDRAM memory and the on-board PCI bus. This device also includes a programmable interrupt controller, an I2C master interface and a pair of DMA engines.
The on-board PCI bus connects the MPC107 to the PMC module site and an Intel 21555 PCI-PCI bridge. The 21555 allows data to pass to and from the host machine, handling differences in bus width and bus speed. Transactions between the PowerPC and PMC site are ignored, and do not affect host PCI bus loading.
The PMC site supports a wide variety of off-the-shelf modules, e.g. analog and digital I/O, networking, coprocessors etc. It can accept any 32- or 64-bit 5V PMC module - 3.3V support is available as a factory option.
A 512k field programmable flash EPROM holds the board’s BIOS which initialises all devices and loads the desired operating system. This supports a simple command line interface through the on-board RS232serial port, using a TCL interpreter.
A standard JTAG adapter supports debugging with any of the large range of PowerPC debuggers such as the WindRiver/EST VisionProbe and AMC PowerTAP. PowerPC software may be developed for Linux or VxWorks.
Host support consisting of drivers, libraries, utilities and examples is available for a variety of platforms:
- Windows NT 4.0, 2000 and XP
- x86 Linux (2.2 and 2.4)
- Sun Solaris 8
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